In　this　paper,　the　impact　of　interconnect　resistance　on　1S1R　crossbar　array　performance　is　analyzed.　Based　on　elements　test　results,　a　crossbar　array　model　is　set　up　considered　interconnect　resistance.　Simulation　shows　that　read　margin　decreases　dramatically　when　interconnect　resistance　is　too　large　to　keep　selector　at　ON-state,　especially　under　floating　scheme.　When　interconnect　resistance　is　larger　than　6　Omega,　write　margin　will　drop　below　50%,　under　1/3　bias　scheme.　The　results　show　that,　the　degradation　of　read　margin　and　write　margin　caused　by　interconnect　resistance　can　be　suppressed　by　improving　the　on/off　ratio　and　low-resistance　of　selector.