The　anisotropy　property　of　silicon　is　a　basic　property　which　has　been　discussed　widely　in　the　reliability　assessment　of　electronic　components.　However,　the　effect　of　silicon　anisotropy　on　the　fracture　behavior　of　through-silicon-via　(TSV)　has　not　been　discussed　in　the　available　literatures.　In　this　paper,　the　effect　of　silicon　anisotropy　on　the　crack　driving　force,　e.g.　energy　release　rate　(ERR),　is　discussed　thoroughly　by　considering　different　crack　depths,　aspect　ratios　as　well　as　heating　and　cooling　effects　in　typical　TSV　under　three　dimensional　(3D)　conditions.　A　semi-empirical　formula　to　estimate　the　ERR　of　TSV　crack　under　thermal　loading　is　proposed　incorporating　the　effect　of　silicon　anisotropy.　Through　numerical　computation　and　theoretical　analysis　of　ERR　for　interface　crack　in　TSV　under　thermal　loading,　the　influence　of　silicon　crystal　orientation　on　ERR　has　been　presented　and　compared.　Because　of　silicon　anisotropy,　the　level　of　ERR　under　3D　case　considering　silicon　anisotropy　is　much　more　remarkable　than　that　of　ERR　under　linearly　isotropic　3D　case　and　linearly　isotropic　2D　case,　which　reveals　the　significant　role　of　silicon　anisotropy　on　interface　fracture　of　TSV.　A　discussion　is　also　carried　out　to　show　the　neglect　of　silicon　anisotropy　will　lead　to　underestimation　of　cracking　behavior　for　interface　crack　of　TSV.　The　effect　of　TSV-Cu　plasticity　on　the　interface　cracking　behavior　is　also　presented　in　which　the　so-called　＂constraint　effect＂　is　also　found　in　the　interface　cracking　behavior　of　TSV.　The　crack　driving　forces　under　various　sizes　of　TSV　with　different　crack　depths　are　also　given　and　discussed　in　this　paper,　which　shows　that　the　size　effect　also　exists　on　the　estimation　of　ERR　for　interface　crack　in　TSV　under　thermal　loading.