The　increasing　power　consumption　of　integrated　circuits　(ICs)　enabled　by　technology　scaling　requires　more　efficient　heat　dissipation　solutions　to　improve　overall　chip　reliability　and　reduce　hotspots.　Rapidly　growing　3-D　IC　technology　strengthens　the　requirement　with　more　devices　stacked　per　unit　area.　Thermal　interface　material　(TIM)　and　MicroChannel　are　widely　adopted　strategies　to　resolve　the　heat　dissipation　problem.　In　recent　years,　carbon　nanotubes　(CNTs)　have　been　proposed　as　a　promising　TIM　due　to　their　superior　thermal　conductivity.　Several　CNT-based　thermal　structures　for　improving　chip　heat　dissipation　have　been　proposed　and　demonstrated　significant　temperature　reduction.　In　this　project,　we　developed　an　improved　CNT　TIM　structure　which　includes　a　CNT　grid　and　thermal　vias.　It　collaborates　with　MicroChannel　to　dissipate　heat　more　efficiently　in　3-D　chips　and　at　the　same　time,　obtain　more　uniform　chip　thermal　profiles.　We　present　simulation-based　experimental　results　that　indicate　up　to　19.88%　peak　temperature　reduction,　7.81%　average　temperature　reduction,　over　66%　maximum　temperature　difference　reduction　on　chip　and　17.26%　improvement　in　chip　reliability　for　IBM-PLACE　2.0　circuit　benchmarks,　showing　the　effectiveness　of　our　proposed　thermal　structure　for　resolving　thermal　challenge　and　improving　chip　reliability　in　3-D　IC.