The　digital　filter　design　of　a　high　resolution　audio　sigma-delta　ADC　is　proposed　in　this　paper.　The　digital　system　is　composed　of　cascaded　integrator　comb(CIC)　filter,　compensation　filter　and　halfband　filter.　The　design　of　digital　decimation　filter　bandwidth　is　24KHz,　the　input　sampling　frequency　is　12.3MHz,　the　pass　band　ripple　coefficient　is　0.01dB,　and　the　stopband　gain　decays　120dB.　By　optimizing　the　structure,　coefficients　and　order　of　the　digital　filter,　the　power　consumption　and　the　area　of　the　system　are　reduced　effectively.　The　behavial　simulation　shows　the　signal　to　noise　ratio　of　the　digital　filter　SNR　is　100.6dB,　and　the　accuracy　is　16bit.　The　Sigma-delta　ADC　is　implemented　in　TSMC　0.35tim　CMOS　process.　The　post　simulation　shows　the　overall　dynamic　range　of　the　sigma-delta　ADC　is　97.4dB.