Indexed by:
Abstract:
Issue queue is a critical structure in the pipeline and more vulnerable to soft-error strikes. Reducing soft error vulnerability of issue queue cannot be ignored in microprocessor reliability design. Instructions clog in issue queue caused by instruction flow mix and functional unit configuration mismatch. That makes the soft error vulnerability of issue queue increases. This paper proposed a vulnerability mitigation method which does not need to change functional unit configuration. It adjusted the instruction flow mix in issue queue, reduced the waiting time of instruction in issue queue to reduce the architectural vulnerability factor. The experiment result shows that average reduces of architectural vulnerability factor are 2.8% and improvement of reliability-performance is 4.9%.
Keyword:
Reprint Author's Address:
Source :
DISTRIBUTED COMPUTING (SNPD)
Year: 2016
Page: 443-448
Language: English
Affiliated Colleges: