To　secure　the　reliability　of　lead　free　solder　is　a　critical　problem　for　microelectronics　packaging.　The　drop　test　is　used　to　characterize　the　reliability　of　the　soldered　assemblies.　Numerical　simulation　techniques　are　popularly　used　for　such　tests　to　reduce　the　cost.　A　proper　working　combination　of　the　damage　criterion　and　the　numerical　simulation　to　predict　fatigue　life　is　still　an　unsolved　problem　for　the　researchers.　IMC　layer　generated　during　the　solder　bumping　process　between　solder　and　under　solder　mask　is　known　as　a　key　aspect　determining　the　failure　of　solder　joint　and　cracks　always　initiate　in　this　layer.　In　this　work,　the　most　fragile　part　in　an　electronic　assembly　is　evaluated　by　FEM;　nano　impact　tests　are　realized　on　IMC　layer　and　on　solder　body.　Tests　prove　that　the　IMC　layer　is　the　most　fragile　part　and　the　crack　initiation　energy　density　in　IMC　layer　as　a　damage　criterion　is　proposed.　Then　this　criterion　is　combined　with　the　board　level　drop　test　simulation　result　to　predict　the　number　of　drop　necessary　for　the　crack　initiation　in　IMC　layer　and　this　number　cannot　be　obtained　directly　during　the　drop　test.