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作者:

Fang Juan (Fang Juan.) (学者:方娟) | Du Wenjuan (Du Wenjuan.)

收录:

CPCI-S EI Scopus

摘要:

As the number of cores on CMP increases, the size of an on-chip cache increases and it consumes more and more power of the whole system. So low-power oriented design has become an inevitable trend. However currently most of the partitioning strategies are aimed at throughput or fairness, ignore the power consumption. In order to reduce system power consumption, a new low-power-oriented hybrid partitioning (LPHP) strategy for shared cache is proposed in this paper. Due to the program locality principle, it uses both private and shared resource-allocation methods to implement the partitioning strategy by combining the two threads whose access appears large difference into one partitioning unit at run-time. Then when running the same application, some of the cache columns can be closed within the performance degradation threshold (PDT).

关键词:

Chip multi-processor Dynamic partition Low power Shared cache

作者机构:

  • [ 1 ] [Fang Juan]Beijing Univ Technol, Coll Comp Sci, Beijing, Peoples R China
  • [ 2 ] [Du Wenjuan]Beijing Univ Technol, Coll Comp Sci, Beijing, Peoples R China

通讯作者信息:

  • 方娟

    [Fang Juan]Beijing Univ Technol, Coll Comp Sci, Beijing, Peoples R China

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来源 :

2012 INTERNATIONAL CONFERENCE ON INDUSTRIAL CONTROL AND ELECTRONICS ENGINEERING (ICICEE)

年份: 2012

页码: 369-372

语种: 英文

被引次数:

WoS核心集被引频次: 1

SCOPUS被引频次: 1

ESI高被引论文在榜: 0 展开所有

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