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作者:

Feng, Shoubo (Feng, Shoubo.) | Duan, Liying (Duan, Liying.) | Wang, Jinhui (Wang, Jinhui.) | Feng, Zhe (Feng, Zhe.) | Zhang, Xan (Zhang, Xan.) | Wu, Lnuchen (Wu, Lnuchen.)

收录:

CPCI-S

摘要:

An embedded LCD display interface in a grating measurement chip is implemented in this paper based on Verilog HDL, which includes four modules in the circuit, MCU, CDU, I/O and a synchronous FIFO. SMG12864C chip is used as the LCD driver module in this paper. Verilog HDL is employed in the interface circuit describing the design, software Modelsim accomplishes the function simulation, and the circuit is synthesized by Synplify tool. After post-simulation and verification on the Xilinx VirtexII family device, the timing analysis indicates that the designed circuit. meets the requirement of display interface. Besides, the circuit also possesses a good flexibility, meaning that it is easy to adapt to other LCD driver modules by simply modifying the timing constraints in MCU module.

关键词:

interface LCD display synchronous FIFO

作者机构:

  • [ 1 ] Beijing Univ Technol, VLSI & Syst Lab, Beijing 100022, Peoples R China

通讯作者信息:

  • [Feng, Shoubo]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100022, Peoples R China

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来源 :

AD'07: PROCEEDINGS OF ASIA DISPLAY 2007, VOLS 1 AND 2

年份: 2007

页码: 2113-2116

语种: 英文

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