Realization of physical unclonable circuit IP core on FPGA - 文章详情页

作者：

Fu, Ziyi (Fu, Ziyi.)

收录：

EI Scopus

摘要：

Physical　unclonable　circuit　(PUF)　is　a　new　type　of　encryption　technology,　which　has　the　characteristics　of　unclonable,　anti-tampering　and　unpredictable.　This　paper　introduces　the　principle　of　arbiter　PUF　and　proposes　an　adjustable　arbiter　PUF　circuit　to　enhance　the　uniformity　and　reliability　of　PUF.　Next,　the　process　of　implementing　this　circuit　on　the　FPGA　is　shown,　including　how　to　use　the　look　up　table(lut)　to　implement　the　two　logic　gates,　how　to　write　the　constraint　file　in　Tcl　script　language,　and　how　to　manually　place　and　route　to　achieve　that　two　paths　of　the　arbiter　PUF　are　completely　symmetrical.　©　2020　IEEE

关键词：

Data Science Cryptography Field programmable gate arrays (FPGA) Computation theory Intellectual property core Table lookup Timing circuits

作者机构：

[ 1 ] [Fu, Ziyi]Beijing-Dublin International College, Beijing University of Technology, Beijing, China

通讯作者信息：

[fu, ziyi]beijing-dublin international college, beijing university of technology, beijing, china

电子邮件地址：

fuziyi1999@163.com

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