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作者:

Cao Xiaoqiu (Cao Xiaoqiu.) | Zeng Jin (Zeng Jin.) | Yang Tao (Yang Tao.)

收录:

CPCI-S

摘要:

This paper analyzes the implementation of high-speed high-resolution data conversion system based on Subranging A/D model in detail. We use a 10 bit ADC and an 8 bit ADC to construct the Subranging A/D system and then make a simulation by QuartusII. The result of the experiment shows that the system's sampling rates is 17MHz, and the resolution is 16 bit, so it can solve an antinomy between sampling rates and resolution which is prevalent in current market.

关键词:

ADC FPGA high-resolution high-speed

作者机构:

  • [ 1 ] [Cao Xiaoqiu]Beijing Univ Technol, Coll Elect & Control Engn, Beijing 100022, Peoples R China
  • [ 2 ] [Zeng Jin]Beijing Univ Technol, Coll Elect & Control Engn, Beijing 100022, Peoples R China
  • [ 3 ] [Yang Tao]Beijing Univ Technol, Coll Elect & Control Engn, Beijing 100022, Peoples R China

通讯作者信息:

  • [Cao Xiaoqiu]Beijing Univ Technol, Coll Elect & Control Engn, Beijing 100022, Peoples R China

电子邮件地址:

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来源 :

ICEMI 2007: PROCEEDINGS OF 2007 8TH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOL IV

年份: 2007

页码: 862-864

语种: 英文

被引次数:

WoS核心集被引频次: 0

SCOPUS被引频次:

ESI高被引论文在榜: 0 展开所有

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