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摘要:
Copper filled through silicon via (TSV-Cu) is a crucial technology for chip stacking and three-dimensional (3D) vertical packaging. The multiple thermal loadings caused by the annealing process and deposition of interconnected dielectric layers lead to continuous TSV-Cu protrusions, which can affect its reliability severely. In this paper, the relationship between second protrusion height of TSV-Cu and its microstructur characteristics during double annealing is quantitatively investigated. It is found that grain size of TSV-Cu after annealing once is larger, and the second protrusion value under additional annealing can be greatly reduced. The reduction phenomenon of second protrusion is relative to the microstructure characteristics such as <111> texture and Sigma 3 grain boundary type. In addition, stress and strain are analyzed by finite element analysis (FEA) to reveal the reduction mechanisms of the second protrusion height of TSV-Cu during double annealing. The initial residual stress of fabricated TSV-Cu and its mechanical property parameters measured by nanoindentation test are incorporated in FEA. The main results show that additional thermal loading leads to a smaller increase of equivalent plastic strain (PEEQ) and von Mises stress if the TSV-Cu is annealed firstly at a high temperature of 400 degrees C. This verifies the second protrusion tendency of TSV-Cu, and explains the reduction mechanisms of the second protrusion height of TSV-Cu.
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来源 :
JOURNAL OF ELECTRONIC MATERIALS
ISSN: 0361-5235
年份: 2022
期: 5
卷: 51
页码: 2433-2449
2 . 1
JCR@2022
2 . 1 0 0
JCR@2022
ESI学科: MATERIALS SCIENCE;
ESI高被引阀值:66
JCR分区:3
中科院分区:4
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