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Through Silicon Via copper (TSV-Cu) is the crucial element for chips stacking and 3D packaging vertically. During the TSV-Cu manufacturing, annealing process is essential to relive the residual stress inner the TSV-Cu and stabilize the microstructure of Cu grain. However, the annealing process usually leads to TSV-Cu protrusions, which have to be flattened by chemical mechanical polishing (CMP) to perform subsequent process. Subsequent process concerned with high temperature treatments will continue to result in a second protrusion of TSV-Cu, which threatens the reliability of interconnect structures above the TSV. In this paper, the effects of various annealing heating rates on protrusions of TSV-Cu and its microstructure evolution are investigated. The influences of grain size and grain boundary types for TSV-Cu under various heating rates on protrusions are analyzed and discussed. © 2022 IEEE.
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年份: 2022
语种: 英文
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