The　digital　low　drop-out　regulator　(LDO)　has　been　used　widely　in　digital　circuits　for　its　low　supply　voltage　characteristics.　However,　as　the　traditional　digital　LDOs　regulate　the　output　voltage　code　at　a　rate　of　1　bit　per　clock　cycle,　the　transient　response　speed　is　limited.　This　paper　presents　a　digital　LDO　to　improve　transient　response　speed　with　a　multi-bit　conversion　technique.　The　proposed　technology　uses　a　voltage　sensor　and　a　time-to-digital　converter　to　convert　the　output　voltage　to　digital　codes.　Based　on　a　65-nm　CMOS　process,　the　proposed　DLDO　reduces　the　settling　time　from　147.8　ns　to　25.2　ns　on　average　and　the　response　speed　is　improved　by　about　six　times.