As　a　key　component　of　power　electronic　devices,　the　reliability　of　insulated　gate　bipolar　transistor　(IGBT)　modules　has　attracted　widespread　attention.　Different　structural　parameters　of　Cu　clips　will　have　different　effects　on　the　parasitic　inductance,　on-resistance,　and　junction-shell　thermal　resistance　of　IGBT　modules.　Therefore,　firstly,　the　finite　element　models　of　Cu　clip　structures　with　different　structural　parameters　are　established,　and　the　parasitic　inductance,　on-resistance,　and　junction-shell　thermal　resistance　of　each　simulation　model　are　calculated　through　finite　element　simulation　analysis.　Secondly,　the　factorial　method　was　used　to　study　the　effects　of　Cu　clip　size　on　parasitic　inductance,　on-resistance　and　junction-shell　thermal　resistance.　Finally,　the　response　surface　method　is　used　to　optimize　the　structure　design,　and　the　prediction　model　of　parasitic　inductance,　on-resistance　and　junction-shell　thermal　resistance　is　established,　and　the　optimal　combination　design　of　parasitic　inductance,　on-resistance　and　junction-shell　thermal　resistance　is　obtained　at　the　same　time.　The　analysis　results　show　that　the　thickness　and　width　of　the　Cu　clip　have　a　greater　influence　on　the　parasitic　inductance　than　the　thickness.　As　the　contact　area　between　the　Cu　clip　and　the　chip　increases,　the　on-resistance　and　junction-shell　thermal　resistance　decrease.