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摘要:
A buried-oxide trench-gate bipolar-mode JFET (BTB-JFET) with an oxide layer buried under the gate region to reduce the gate-drain capacitance Cgd is proposed. Simulations with a resistive load circuit for power loss comparison at high frequency application are performed with 20V-rated power switching devices, including a BTB-JFET, a trench MOS-FET (T-MOSFET) generally applied in present industry, and a conventional trench-gate bipolar-mode JFET (TB-JFET) without buried oxide, for the first time. The simulation results indicate that the switching power loss of the normally-on BTB-JFET is improved by 37% and 14% at 1MHz compared to the T-MOSFET and the normally-on TB-JFET, respectively. In order to demonstrate the validity of the simulation, the normally-on TB-JFET and BTB-JFET have been fabricated successfully for the first time, where the buried oxide structure is realized by thermal oxidation. The experimental results show that the Cgd of the BTB-JFET is decreased by 45% from that of the TB-JFET at zero source-drain bias. Compared to the TB-JFET, the switching time and switching power loss of the BTB-JFET decrease approximately by 7.4% and 11% at 1MHz, respectively. Therefore, the normally-on BTB-JFET could be pointing to a new direction for the R and D of low voltage and high frequency switching devices.
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来源 :
Chinese Journal of Semiconductors
ISSN: 0253-4177
年份: 2008
期: 10
卷: 29
页码: 1860-1863
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