Optimization and implementation of H.264 encoder based on DSP platform - 文章详情页

作者：

Wang, Qiang (Wang, Qiang.) | Zhuo, Li (Zhuo, Li.) | Shen, Lan-Sun (Shen, Lan-Sun.)

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摘要：

There　is　great　complexity　in　H.264　encoder.　Therefore,　it　is　difficult　to　implement　an　encoder　in　DSP　platform　which　can　run　in　real-time　environment.　In　this　paper,　the　coding　architecture　of　H.264　Baseline　Profile　is　introduced　first,　and　some　reasons　for　limiting　speed　are　presented　according　to　the　analysis　of　the　coding　architecture.　Besides,　several　implementation　techniques　for　optimization　are　presented　based　on　the　characteristics　of　TMS320DM642　chip.　The　H.264　Baseline　Profile　encoder　is　finally　real-time　implemented　based　on　DSP　platform.　The　testing　results　demonstrate　that　encoder　has　sped　up　remarkably　after　optimization,　which　can　meet　the　real-time　encoding　requirements　for　the　video　sequences　with　CIF　format.

关键词：

Algorithms Architecture Computational complexity Digital signal processing Image coding Microprocessor chips Optimization Testing

作者机构：

[ 1 ] [Wang, Qiang]Signal and Information Processing Lab, Beijing University of Technology, Beijing 100022, China
[ 2 ] [Zhuo, Li]Signal and Information Processing Lab, Beijing University of Technology, Beijing 100022, China
[ 3 ] [Shen, Lan-Sun]Signal and Information Processing Lab, Beijing University of Technology, Beijing 100022, China

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