Analyze noise of 5.8 GHz/0.18 μm CMOS integrated low noise amplifier - 文章详情页

作者：

Chen, Jian-Xin (Chen, Jian-Xin.) | Wang, Wen-Jing (Wang, Wen-Jing.) | Yuan, Zhi-Peng (Yuan, Zhi-Peng.) | Zhang, Chi (Zhang, Chi.) (学者：张弛)

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摘要：

To　optimize　the　post　simulation　result　of　5.8　GHz　low　noise　amplifiers　(LNA),　we　analyzed　the　parasitic　effect　on　gain　and　noise　figure　(NF).　We　took　some　measures　in　circuit　design　and　layout　design,　which　improved　the　post　simulation　result.　The　post　simulation　result　is　similar　to　pre　simulation.　In　the　simulation,　we　considered　the　effect　of　gate　resistor　and　gate　induced　current　noise.　The　LNA　possesses　a　13.7　dB　gain　with　1.6　dB　NF　and　8.3　mW.　It　reached　the　requirement　of　802.11a.　At　last,　we　provided　the　layout　and　post　simulation　of　the　LNA.

关键词：

Local area networks CMOS integrated circuits Signal noise measurement Integrated circuits Amplifiers (electronic) Wireless telecommunication systems Resistors

作者机构：

[ 1 ] [Chen, Jian-Xin]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
[ 2 ] [Wang, Wen-Jing]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
[ 3 ] [Yuan, Zhi-Peng]Beijing Embedded System Key Lab., Beijing 100022, China
[ 4 ] [Zhang, Chi]Beijing Embedded System Key Lab., Beijing 100022, China

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