Design of finite state machine based on VHDL - 文章详情页

作者：

Song, Ze-Ming (Song, Ze-Ming.) | Chen, Wen-Kai (Chen, Wen-Kai.)

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EI Scopus PKU CSCD

摘要：

Comparing　two　finite　state　machines,　how　to　use　VHDL　to　design　a　reliable　and　stable　finite　state　machine　is　declared.　Due　to　the　difference　between　the　two　finite　state　machines,　then　their　stability　is　different　with　new　method　proposed　in　this　paper,　we　can　design　a　reliable　and　stable　finite　state　machine　when　take　normal　code　method.

关键词：

Computer hardware description languages Digital circuits Encoding (symbols) Finite automata Logic circuits Reliability

作者机构：

[ 1 ] [Song, Ze-Ming]College of Electrical Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
[ 2 ] [Chen, Wen-Kai]College of Electrical Information and Control Engineering, Beijing University of Technology, Beijing 100022, China

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