An　under-voltage　locking　circuit　for　driving　chip　is　designed　to　ensure　the　stability　of　the　enhanced　GaN　HEMT　driving　voltage.　Firstly,　SPICE　model　of　enhanced　GaN　HEMT　device　is　used　to　build　the　circuit.　The　basic　electrical　characteristics　of　the　device　are　analyzed.　Then　the　parasitic　inductance　of　the　enhanced　GaN　HEMT　device　caused　by　PCB　wiring　and　pad　layout　is　simulated.　According　to　the　volt-ampere　characteristics　of　parasitic　PNP　transistors　in　Shanghua　CSMC　0.5um　CMOS　process,　an　under-voltage　locking　circuit　with　Schmidt　flip-flops　and　inverters　at　the　output　end　is　designed　which　improves　the　driving　ability　of　the　circuit.　When　the　power　supply　voltage　rises/falls　between　3-5V,　the　rising/falling　threshold　is　4.1V/3.7V,　and　the　threshold　hysteresis　is　400mV.　When　the　temperature　changes　from-40°C　to　125°C,　there　is　a　small　temperature　drift.　This　under　voltage　lock　out　circuit　can　effectively　prevent　the　power　supply　from　abnormal　transition　due　to　noise　and　load-induced　interference　and　the　incomplete　conduction　state　of　the　enhanced　GaN　HEMT.　©　2019　IEEE.