The　Heterogeneous　Network　on　Chip　(HNoC)　integrates　CPU　cores　and　GPU　cores,　as　well　as　other　components,　such　as　Last　Level　Cache　and　Memory　Controller.　The　various　components　on　the　chip　work　together.　The　quality　of　communication　between　components　becomes　critical.　The　GPUs　have　a　large　amount　of　computing　resources　in　parallel,　so　it　has　a　large　number　of　threads.　This　feature　makes　the　communication　between　the　GPUs　and　the　last　level　cache　and　the　memory　controller　more　frequent.　The　communication　of　each　link　in　the　traditional　network　on-chip　is　relatively　average.　However,　the　congestion　near　the　GPU　node　in　the　heterogeneous　on-chip　network　is　serious,　which　affects　the　performance　of　the　on-chip　network.　Therefore,　we　propose　a　fault-tolerant　routing　algorithm　based　on　congestion　awareness　on　HNoC.　We　also　monitor　the　traffic　of　the　network　by　implementing　the　local　congestion　monitor　module.　Heuristically　determine　the　node　and　direction　of　the　on-chip　network　application　turning　mode.　In　order　to　accurately　evaluate　the　impact　of　the　experimental　scheme　on　system　performance,　this　paper　selects　the　Noxim　NoC　simulator　as　the　basic　experimental　platform.　Experimental　comparison　the　proposed　algorithm　with　the　traditional　fault-tolerant　algorithm,　in　the　heterogeneous　network　with　failure　rates　of　5%,　10%,　15%　and　20%,　the　average　latency　is　reduced　by　35%,　22%,　25%　and　24　respectively.　The　average　throughput　saturation　decreased　by　12.5%,　41.7%,　23.7%　and　26.3%,　respectively.　It　has　a　significant　improvement　in　performance.　©　2019　IEEE.