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作者:

Tan, Zuxiong (Tan, Zuxiong.) | Guo, Weiling (Guo, Weiling.) | Gong, Guoliang (Gong, Guoliang.) | Lu, Huaxiang (Lu, Huaxiang.)

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EI Scopus

摘要:

The linear shift feedback register (LFSR) are widely used in pseudo random number generator (PRNG). Through parallelization, the generation rate can achieve unprecedented speeds. Based on the leap-ahead LFSR architecture, this paper proposed a new parallel architecture which can improve the randomness significantly without changing the output bit-width. Compared with two latest high-quality PRNGs, the proposed architecture in this paper has advantages in randomness, resource utilization and output bandwidth. Especially, the proposed architecture reduces the occupancy of resources up to 62% and lower the area-time up to 53% compared to the recent architecture. © 2018 IEEE.

关键词:

Field programmable gate arrays (FPGA) Integrated circuits Number theory Parallel architectures Random number generation Random processes Shift registers

作者机构:

  • [ 1 ] [Tan, Zuxiong]Key Laboratory of Opto-electronics Technology, Ministry of Education, Beijing University of Technology, Beijing; 100124, China
  • [ 2 ] [Guo, Weiling]Key Laboratory of Opto-electronics Technology, Ministry of Education, Beijing University of Technology, Beijing; 100124, China
  • [ 3 ] [Gong, Guoliang]Laboratory of Artificial Neural Networks, Institute of Semiconductors, Chinese Academy of Sciences, Beijing; 100083, China
  • [ 4 ] [Lu, Huaxiang]Laboratory of Artificial Neural Networks, Institute of Semiconductors, Chinese Academy of Sciences, Beijing; 100083, China

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年份: 2018

页码: 57-58

语种: 英文

被引次数:

WoS核心集被引频次: 0

SCOPUS被引频次: 5

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