By　using　HDCP　engineering　code　as　a　verification　prototype,　the　critical　path　was　identified　and　extracted　from　timing　path　report.　The　gate　monitoring　report　could　be　getting　from　monitoring　gates　which　are　corresponding　to　the　critical　path　in　the　netlist,　while　doing　simulation　with　different　testbench.　Through　the　comparison　between　the　path　report　and　the　gate　monitoring　report,　coverage　rate　of　the　critical　path　after　every　simulation　and　the　optimal　testbench　for　coverage　rate　of　critical　path　were　obtained.　In　this　way,　we　can　reduce　the　error　probability　and　improve　the　efficiency　of　verification.　©　2016　IEEE.