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A novel low temperature coefficient (TC) high power supply rejection ration (PSRR) CMOS bandgap voltage reference (BGR) is implemented in TSMC 0.35μm CMOS Technology. This design can be applied to voltage regulators particularly used in implanted chips. The temperature compensation is optimized by adjusting proper ratio of resistances which have opposite TC. Its PSRR is improved by using cascode current mirrors and adopting an independent current source structure. The design operates within a range of 2.3V to 5.5V and has a line sensitivity of 0.116%/V. At room temperature, the reference voltage is 1.14V and has a measured TC of 0.662ppm/°C in a wide temperature range of-40 °C to 125 °C. The circuit performs a PSRR property of 96dB@1KHz and more than 30dB@1MHz with a start-up time below 5 μs. © 2016 IEEE.
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