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作者:

Li, Ming (Li, Ming.) | Wan, Peiyuan (Wan, Peiyuan.)

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EI Scopus

摘要:

In this Paper, a fractional-N frequency synthesizer fabricated in a 0.18μm process is designed for a FSK transceiver. The precision of the charge pump can be improved by exploiting the op amplifier. Based on capacitance multiplication technique, the area of loop filter is reduced. The fractional-N divider function is realized by the sigma delta modulator. FIR filter is designed in the input stage of sigma-delta modulator to avoid spectrum aliasing. The data of sigma delta modulator can be stably transmitted to programmable frequency divider without meta-stability. The minimum step of frequency is 28Hz with 30MHz reference clock. The measurement results show that the phase noise is-129.69dBc/Hz @1-MHz offset with centered frequency at 390MHz. © 2016 IEEE.

关键词:

Delta modulation Delta sigma modulation FIR filters Frequency dividing circuits Frequency shift keying Frequency synthesizers Integrated circuits Modulators Phase noise Transceivers

作者机构:

  • [ 1 ] [Li, Ming]Beijing Embedded System Key Lab, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing; 100124, China
  • [ 2 ] [Wan, Peiyuan]Beijing Embedded System Key Lab, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing; 100124, China

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年份: 2016

页码: 1425-1427

语种: 英文

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