Semi-custom　design　flow　is　an　efficient　way　to　design　digital　integrated　circuit　(IC).　It　realizes　physical　IC　design　through　translating　hardware　description　languages　(HDL)　into　a　GDS　layout　file.　By　running　scripts,　the　HDL　code　is　synthesized　into　a　cell　level　schematic.　Then,　the　placing　and　routing　procedures　are　performed,　violations　are　fixed,　optimizations　are　achieved,　and　verifications　are　finished.　Synopsys　and　Cadence　are　two　leading　companies　in　the　Electronic　Design　Automation　(EDA)　industry.　But　most　of　time,　foundries　fail　to　provide　two　separate　design　kits　for　two　companies.　If　the　foundry　only　provides　a　design　kit　for　tools　from　one　leading　EDA　company,　it　will　be　difficult　to　use　the　same　kit　for　the　other　one.　In　this　paper,　the　main　difference　between　design　kits　of　different　companies　are　shown,　and　a　solution　to　make　one　design　kits　compatible　with　the　other　one　is　provided.　©　2016　IEEE.