In　3D　through-silicon-via　(TSV)　interposer　package,　there　are　large　numbers　of　micro　bumps　and　micro　solder　balls,　the　sizes　of　the　entities　in　the　package　having　a　difference　of　3　orders　of　magnitude.　This　multi-scale　structure　brings　difficulties　to　establish　the　finite　element　model　for　analyzing　the　thermal　fatigue　life　of　board-level　solder　joint.　Homogenization　method　is　adopted　to　avoid　these　difficulties　in　this　work.　The　micro　bump/underfill　layer　between　the　chip　and　TSV　interposer　is　replaced　by　the　homogenous　material　layer　with　equivalent　material　parameters　determined　by　homogenization　method.　Four　different　homogenization　schemes　are　proposed　to　investigate　the　thermal　fatigue　life　of　the　board-level　solder　joint,　and　their　results　are　compared.　It　suggests　that　the　micro　bump/underfill　layer　between　the　chip　and　TS　V　interposer　can　be　replaced　by　the　corresponding　underfill　material　layer　in　the　finite　element　analysis　of　solder　joint　fatigue　life.　©　2014　IEEE.