Analysis and design of CMOS charge pump for EEPROM - 文章详情页

作者：

Yin, Haibin (Yin, Haibin.) | Peng, Xiaohong (Peng, Xiaohong.) | Wang, Jinhui (Wang, Jinhui.) | Wei, Zikui (Wei, Zikui.) | Gong, Na (Gong, Na.)

收录：

EI Scopus

摘要：

A　CMOS　charge　pump　circuit,　which　can　be　applied　in　electrically　erasable　programmable　read-only　memory　(EEPROM),　is　introduced　in　this　paper.　The　performance　including　output　voltage,　rise　time,　power　as　well　as　changing　pattern　of　output　voltage　versus　load　current　of　the　traditional　Dickson　charge　pump　(TDCP),　improved　charge　pump　(ICP),　and　second　improved　charge　pump　schematic　(NCP-2)　are　analyzed　and　compared.　The　simulation　results　show　that　the　output　voltage　of　NCP-2　is　higher　than　other　two　charge　pump　circuits　in　three　process　corners.　Meanwhile,　the　power　consumption　of　NCP-2　is　also　much　higher　than　other　two　circuits.　©　2014　IEEE.

关键词：

Charge pump circuits CMOS integrated circuits Flash memory Integrated circuit design

作者机构：

[ 1 ] [Yin, Haibin]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 2 ] [Peng, Xiaohong]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 3 ] [Wang, Jinhui]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 4 ] [Wei, Zikui]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 5 ] [Gong, Na]Dept. of Electrical and Computer Engineering, North Dakota State University, ND; 58102, United States

通讯作者信息：

[wang, jinhui]vlsi and system lab, beijing university of technology, beijing; 100124, china

电子邮件地址：

wangjinhui@bjut.edu.cn

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