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Author:

Zhang, Junteng (Zhang, Junteng.) | Wang, Jinhui (Wang, Jinhui.) | Gong, Na (Gong, Na.)

Indexed by:

EI Scopus

Abstract:

New bidirectional IO multiplexing circuits are presented in this paper. They are applied in the chips which consist of several modules, making the modules share the same IOs. The chip area therefore is saved by reducing the number of IOs. As compared with the unidirectional IO multiplexing circuits, it realizes bidirectional IO multiplexing among different modules. Taking the chip which consists of four modules as an example, the new IO multiplexing circuits based on static and dynamic CMOS circuit are compared and analyzed. According to the simulation results, the maximum operating frequency of new bidirectional IO multiplexing circuit reaches as high as 2.5GHz. © 2014 IEEE.

Keyword:

Timing circuits Electric network analysis Integrated circuit manufacture

Author Community:

  • [ 1 ] [Zhang, Junteng]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 2 ] [Wang, Jinhui]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 3 ] [Gong, Na]Dept. of Electrical and Computer Engineering, North Dakota State University, ND; 58102, United States

Reprint Author's Address:

  • [wang, jinhui]vlsi and system lab, beijing university of technology, beijing; 100124, china

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Year: 2014

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

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Chinese Cited Count:

30 Days PV: 0

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