An　8-bit　Reduced　Instruction　Set　Computer　(RISC)　Micro　Controller　Unit　(MCU)　has　been　implemented　in　this　paper,　including　the　design　of　pipeline　and　critical　modules.　The　whole　design　uses　two-stage　pipeline　which　enables　instruction-fetching　modules　and　instruction-executing　modules　to　work　simultaneously.　Its　instruction　set　is　compatible　with　PIC16F87XA　instruction　set　and　it　achieves　the　execution　speed　of　a　single-cycle　instruction　(except　for　the　program　transfer　instruction).　The　design　is　described　by　Verilog　HDL,　simulated　by　Modelsim　and　verificated　by　FPGA.　The　whole　system　can　work　normally　and　can　achieve　40MHz　frequency.