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摘要:
A linearity improvement technique is proposed on the design of low frequency (132 KHz center frequency, 40 KHz band frequency) power-line communication band-pass filter, which focus on the linearity of large R-MOSFET. In order to enhance the linearity of the triode-mode MOSFET variable resistors, driving the controlling voltages of the R-MOSFET in a resistor tuning schematic instead of the main signal schematic is chosen. Further more, appropriate control bits are added to adjust the center frequency of the band-pass filter. Fabricated in SMIC0.18μm CMOS technology, this 6th-order Chebvshev I filter achieves 5K Hz band frequency deviation and 43dB in-band IIP3, and dissipates 4.86mW from a 1.8-V supply; the on-chip continuous automatic tuning block (MASTER) dissipates 2.05mW at the supply of 3.3V. © 2010 IEEE.
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年份: 2010
页码: 843-846
语种: 英文
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