Calibration for realization errors of two-channel HFB ADC base on single analog filter architecture - Details

Author：

Liu, Sujuan (Liu, Sujuan.) | Yang, Yue (Yang, Yue.) | Zhang, Te (Zhang, Te.) | Chen, Jianxin (Chen, Jianxin.)

Indexed by：

EI Scopus

Abstract：

The　single　analog　filter　(SAF)　hybrid　filter　bank　(HFB)　ADC　is　presented　in　this　paper.　Base　on　SAF　architecture,　a　calibration　model　is　derived　to　integrate　the　analog　filter＇s　realization　errors　and　channel　mismatches　errors.　A　two-channel　SAF　HFB　ADC　with　12-bit　resolution　and　200MHz　sampling　rate　is　implemented.　The　experimental　results　show　that　the　average　spurious-free　dynamic　range　(SFDR)　over　the　whole　frequency　spectrum　enhanced　from　35　dB　to　88.3　dB　when　the　proposed　calibration　method　has　been　used.　©2010　IEEE.

Keyword：

Errors Analog to digital conversion

Author Community：

[ 1 ] [Liu, Sujuan]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China
[ 2 ] [Yang, Yue]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China
[ 3 ] [Zhang, Te]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China
[ 4 ] [Chen, Jianxin]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China