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作者:

Hou, Ligang (Hou, Ligang.) | Wu, Wuchen (Wu, Wuchen.) (学者:吴武臣) | Zhu, Jiahui (Zhu, Jiahui.)

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摘要:

This paper implemented MBIST in a H.264/AVC video decoder chip, Neptune. Neptune has 1.5 million gates, 37 memory blocks. In need of testing, a complete design for test should be done. This paper mainly designed and implemented Memory BIST targeting the 34 RAM block, except the 3 ROM blocks. The design included building design flow, choosing algorithm, generating background data and BIST controller integration. By BIST controller reuse, circuit area was saved. Working mode simulation, test time analysis, fault coverage analysis, circuit performance evaluation were done. The result showed that the MBIST achieved 100% fault coverage by a 2.49% increase in chip area. © 2010 IEEE.

关键词:

Signal processing Decoding Built-in self test Architectural design Motion Picture Experts Group standards Random access storage

作者机构:

  • [ 1 ] [Hou, Ligang]VLSI and System Lab., Beijing University of Technology, Beijing, China
  • [ 2 ] [Wu, Wuchen]VLSI and System Lab., Beijing University of Technology, Beijing, China
  • [ 3 ] [Zhu, Jiahui]HSC-DAC Dept., Analog Devices Inc., Beijing Design Center, Beijing, China

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年份: 2010

卷: 1

页码: V187-V190

语种: 英文

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WoS核心集被引频次: 0

SCOPUS被引频次: 3

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