To　display　video　stream　smooth,　off-chip　memory　access　is　crucial　factor　in　motion　compensation　and　display　feeder.　This　paper　proposes　a　novel　memory　system　architecture,　based　on　motion　vector　analysis,　for　video　display,　which　reduces　more　than　60%　cycle　number.　The　efficient　memory　access　style　for　display　feeder　ensures　sufficient　data　transfer　bandwidth.　And,　the　special　memory　system　keeps　data　undisturbed　with　each　other.　Accordingly,　a　special　local　AM-BA,　used　only　for　reference　frame　makes　memory　access　at　high　speed,　and　dual　memory　controllers　make　bus　efficient.　Experiment　results　show　that　the　design　supports　30　fps　real-time　digital-HDTV　720　p　clocking　at　60　MHz.