This　paper　proposes　memory　management　system　for　multimedia　application　based　on　dual-core　platform.　To　use　memory　bus　bandwidth　efficiently　and　reduce　memory　bus　transition,　two　steps　store　optimization　in　control　level　is　adopted　and　bus　efficiency　increases　nearly　35%　compared　with　former　scheme.　To　harmonize　different　master　requirement,　reasonable　schedule　level　arranges　memory　access　priority.　Under　these　two　levels,　memory　controller　can　cope　with　H.264　HDTV　decoder　1920　×　1080　@　30　frames　per　sec　real　time　access　clocking　at　100MHz.　Moreover,　this　VLSI　design　is　convenient　to　be　integrated　into　different　multimedia　processing　platform.　©　2006　ICASE.