Simulation study on single event burnout in linear doping buffer layer engineered power VDMOSFET - Details

Author：

Jia, Y. (Jia, Y..) | Su, H. (Su, H..) | Jin, R. (Jin, R..) | Hu, D. (Hu, D..) | Wu, Y. (Wu, Y..)

Indexed by：

Scopus CSCD

Abstract：

The　addition　of　a　buffer　layer　can　improve　the　device＇s　secondary　breakdown　voltage,　thus,　improving　the　single　event　burnout　(SEB)　threshold　voltage.　In　this　paper,　an　N　type　linear　doping　buffer　layer　is　proposed.　According　to　quasi-stationary　avalanche　simulation　and　heavy　ion　beam　simulation,　the　results　show　that　an　optimized　linear　doping　buffer　layer　is　critical.　As　SEB　is　induced　by　heavy　ions　impacting,　the　electric　field　of　an　optimized　linear　doping　buffer　device　is　much　lower　than　that　with　an　optimized　constant　doping　buffer　layer　at　a　given　buffer　layer　thickness　and　the　same　biasing　voltages.　Secondary　breakdown　voltage　and　the　parasitic　bipolar　turn-on　current　are　much　higher　than　those　with　the　optimized　constant　doping　buffer　layer.　So　the　linear　buffer　layer　is　more　advantageous　to　improving　the　device＇s　SEB　performance.　©　2016　Chinese　Institute　of　Electronics.

Keyword：

Heavy ion Au beam; Linear doping buffer layer; Quasi-static avalanche; Single event burnout (SEB)

Author Community：

[ 1 ] [Jia, Y.]Power Semiconductor and Power Integrated Circuit Laboratory, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing, 100124, China
[ 2 ] [Su, H.]Power Semiconductor and Power Integrated Circuit Laboratory, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing, 100124, China
[ 3 ] [Jin, R.]New Electrical Materials and Microelectronics Institute, State Grid Smart Electrical Engineering, Beijing, 100192, China
[ 4 ] [Hu, D.]Power Semiconductor and Power Integrated Circuit Laboratory, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing, 100124, China
[ 5 ] [Wu, Y.]Power Semiconductor and Power Integrated Circuit Laboratory, College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing, 100124, China

Reprint Author's Address：

[Su, H.]Power Semiconductor and Power Integrated Circuit Laboratory, College of Electronic Information and Control Engineering, Beijing University of TechnologyChina

Email：

shybjxyx@163.com

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Source ：

Journal of Semiconductors

ISSN： 1674-4926

Year： 2016

Issue： 2

Volume： 37

Cited Count：

WoS CC Cited Count： 0

SCOPUS Cited Count： 5

ESI Highly Cited Papers on the List： 0 Unfold All

WanFang Cited Count：

Chinese Cited Count：

30 Days PV： 0

Affiliated Colleges：

信息学部

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