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作者:

Feng, S. (Feng, S..) | Duan, L. (Duan, L..) | Wang, J. (Wang, J..) | Feng, Z. (Feng, Z..) | Zhang, J. (Zhang, J..) | Wu, W. (Wu, W..)

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Scopus

摘要:

An embedded LCD display interface in a grating measurement chip is implemented in this paper based on Verilog HDL, which includes four modules in the circuit, MCU, CDU, I/O and a synchronous FIFO. SMG12864C chip is used as the LCD driver module in this paper. Verilog HDL is employed in the interface circuit describing the design, software Model-sim accomplishes the function simulation, and the circuit is synthesized by Synplify tool. After post-simulation and verification on the Xilinx VirtexII family device, the timing analysis indicates that the designed circuit meets the requirement of display interface. Besides, the circuit also possesses a good flexibility, meaning that it is easy to adapt to other LCD driver modules by simply modifying the timing constraints in MCU module.

关键词:

Interface; LCD display; Synchronous FIFO

作者机构:

  • [ 1 ] [Feng, S.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China
  • [ 2 ] [Duan, L.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China
  • [ 3 ] [Wang, J.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China
  • [ 4 ] [Feng, Z.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China
  • [ 5 ] [Zhang, J.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China
  • [ 6 ] [Wu, W.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China

通讯作者信息:

  • [Feng, S.]VLSI and System Laboratory, Beijing University of Technology, Beijing 100022, China

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来源 :

AD'07 - Proceedings of Asia Display 2007

年份: 2007

卷: 2

页码: 2113-2116

语种: 英文

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